Conventional computers are based on a von Neumann architecture, where separate units process and store data—see memory 11 coupled to arithmetic logical unit (ALU) 12, wherein ALU 12 is coupled to input 13 and output 14 circuits. A different approach is to process data within the same unit that stores the data (i.e., process data within memory)—thus arithmetic logical memory 21 is coupled to ALU 22 that is coupled to input 13 and output 14 circuits. An illustration of both architectures is shown in FIGS. 1A-1B. In this paper, a hardware version of processing within memory is proposed. The proposed circuit is based on a study of rectangular logic arrays, first proposed in 1972 by Sheldon Akers [1].
In an Akers logic array (or, in short, an Akers logic array), the execution of any Boolean function is performed by flowing data across an array of primitive logic cells. The data are transferred from each primitive logic cell to neighboring cells, as shown in FIG. 2A—array 30 is shown as including 3×3 primitive logic cells such as 30(1,1) of FIG. 2B. The operation of an Akers logic array is similar to systolic array [2] and cellular automata [19]. The primitive logic cell 30(1,1) has three inputs and two outputs, as shown in FIG. 2B. The inputs of the primitive logic cell include two control inputs x and y and a variable input z, which is replaced in our circuit by an internal state (i.e., the stored data). The primitive logic cell performs a predefined logical operation f(x, y, z), which is described below. The output of each primitive logic cell is used as control inputs x and y of, respectively, the bottom and right neighboring primitive logic cells.
To execute any Boolean function within an Akers logic array, specific input values are inserted as control inputs into the left-most column and the upper-most row. The control input y of the left-most column is set to 1 for all rows, and the control input x of the upper-most row is set to 0 for all columns, as shown in FIG. 2A. These control inputs along with the array structure and the function f(x, y, z) determine the Boolean function computed by the array. The inputs to this Boolean function are the bits stored within the array cells. The output of the Boolean function computed by the Akers logic array is the output of the primitive logic cell at the bottom right of the array. It is also possible to define multiple Boolean functions (or, alternatively, a multi-bit output) on the same Akers logic array, in which case additional primitive cell outputs are used as external functional outputs. To date, an Akers logic array has been treated as a mathematical concept since the benefit of an Akers logic array with conventional semiconductor technology (i.e., CMOS technology) is limited.